Enhance lit Core tests for CM52 (6c0d0b2b) · Commits · Wenxi XU / Cmsis 6

.devcontainer/ubuntu-22.04/vcpkg-configuration.json

+2 −2

Original line number	Diff line number	Diff line
		@@ -2,7 +2,7 @@
		"registries": [
		{
		"kind": "artifact",
		"location": "https://artifacts.keil.arm.com/vcpkg-ce-registry/registry.zip",
		"location": "https://artifacts.tools.arm.com/vcpkg-ce-registry/registry.zip",
		"name": "arm"
		}
		],
		@@ -11,7 +11,7 @@
		"arm:ninja": "^1.10.2",
		"arm:compilers/arm/armclang":"^6.22.0",
		"arm:compilers/arm/arm-none-eabi-gcc": "^13.2.1",
		"arm:compilers/arm/llvm-embedded": "^17.0.1-0",
		"arm:compilers/arm/llvm-embedded": "^18.1.3",
		"arm:tools/open-cmsis-pack/cmsis-toolbox": "^2.1.0-0",
		"arm:models/arm/avh-fvp": "11.22.39",
		"arm:debuggers/arm/armdbg": "^6.0.0"

CMSIS/Core/Test/build.py

+10 −0

Original line number	Diff line number	Diff line
		@@ -29,6 +29,9 @@ class DeviceAxis(Enum):
		CM35P = ('Cortex-M35P', 'CM35P')
		CM35PS = ('Cortex-M35PS', 'CM35PS')
		CM35PNS = ('Cortex-M35PNS', 'CM35PNS')
		CM52 = ('Cortex-M52', 'CM52')
		CM52S = ('Cortex-M52S', 'CM52S')
		CM52NS = ('Cortex-M52NS', 'CM52NS')
		CM55 = ('Cortex-M55', 'CM55')
		CM55S = ('Cortex-M55S', 'CM55S')
		CM55NS = ('Cortex-M55NS', 'CM55NS')
		@@ -84,5 +87,12 @@ def filter_iar(config):
		return config.compiler == CompilerAxis.IAR


		@matrix_filter
		def filter_gcc_cm52(config):
		device = config.device.match('CM52*')
		compiler = config.compiler == CompilerAxis.GCC
		return device and compiler


		if __name__ == "__main__":
		main()

CMSIS/Core/Test/lit.cfg.py

+81 −0

Original line number	Diff line number	Diff line
		@@ -325,6 +325,84 @@ DEVICES = {
		'__Vendor_SysTickConfig': '0U'
		}
		},
		'CM52': {
		'arch': 'thumbv8.1m.main',
		'triple': 'thumbv8m',
		'abi': 'eabihf',
		'mcpu': 'cortex-m52',
		'mfpu': 'fpv5-d16',
		'mpu': True,
		'features': ['thumbv6m', 'thumbv7m', 'dsp', 'thumbv8m.base', 'thumbv8m.main', 'thumbv8.1m.main', 'thumb-2', 'sat', 'ldrex', 'clz'],
		'header': 'core_cm52.h',
		'defines': {
		'__CM52_REV': '0x0000U',
		'__FPU_PRESENT': '1U',
		'__FPU_DP': '1U',
		'__MPU_PRESENT': '1U',
		'__ICACHE_PRESENT': '1U',
		'__DCACHE_PRESENT': '1U',
		'__UCACHE_PRESENT': '1U',
		'__SAUREGION_PRESENT': '8U',
		'__DSP_PRESENT': '1U',
		'__VTOR_PRESENT': '1U',
		'__PMU_PRESENT': '1U',
		'__PMU_NUM_EVENTCNT': '8U',
		'__NVIC_PRIO_BITS': '3U',
		'__Vendor_SysTickConfig': '0U'
		}
		},
		'CM52S': {
		'arch': 'thumbv8.1m.main',
		'triple': 'thumbv8m',
		'abi': 'eabihf',
		'mcpu': 'cortex-m52',
		'mfpu': 'fpv5-d16',
		'mpu': True,
		'features': ['thumbv6m', 'thumbv7m', 'dsp', 'thumbv8m.base', 'thumbv8m.main', 'thumbv8.1m.main', 'thumb-2', 'sat', 'ldrex', 'clz'],
		'header': 'core_cm52.h',
		'defines': {
		'__CM52_REV': '0x0000U',
		'__FPU_PRESENT': '1U',
		'__FPU_DP': '1U',
		'__MPU_PRESENT': '1U',
		'__ICACHE_PRESENT': '1U',
		'__DCACHE_PRESENT': '1U',
		'__UCACHE_PRESENT': '1U',
		'__SAUREGION_PRESENT': '8U',
		'__DSP_PRESENT': '1U',
		'__VTOR_PRESENT': '1U',
		'__PMU_PRESENT': '1U',
		'__PMU_NUM_EVENTCNT': '8U',
		'__NVIC_PRIO_BITS': '3U',
		'__Vendor_SysTickConfig': '0U'
		}
		},
		'CM52NS': {
		'arch': 'thumbv8.1m.main',
		'triple': 'thumbv8m',
		'abi': 'eabihf',
		'mcpu': 'cortex-m52',
		'mfpu': 'fpv5-d16',
		'mpu': True,
		'features': ['thumbv6m', 'thumbv7m', 'dsp', 'thumbv8m.base', 'thumbv8m.main', 'thumbv8.1m.main', 'thumb-2', 'sat', 'ldrex', 'clz'],
		'header': 'core_cm52.h',
		'defines': {
		'__CM52_REV': '0x0000U',
		'__FPU_PRESENT': '1U',
		'__FPU_DP': '1U',
		'__MPU_PRESENT': '1U',
		'__ICACHE_PRESENT': '1U',
		'__DCACHE_PRESENT': '1U',
		'__UCACHE_PRESENT': '1U',
		'__SAUREGION_PRESENT': '8U',
		'__DSP_PRESENT': '1U',
		'__VTOR_PRESENT': '1U',
		'__PMU_PRESENT': '1U',
		'__PMU_NUM_EVENTCNT': '8U',
		'__NVIC_PRIO_BITS': '3U',
		'__Vendor_SysTickConfig': '0U'
		}
		},
		'CM55': {
		'arch': 'thumbv8.1m.main',
		'triple': 'thumbv8m',
		@@ -730,6 +808,9 @@ class Toolchain_Clang(Toolchain):
		'CM35P': 'thumbv8m.main-none-unknown-eabihf',
		'CM35PS': 'thumbv8m.main-none-unknown-eabihf',
		'CM35PNS': 'thumbv8m.main-none-unknown-eabihf',
		'CM52': 'thumbv8.1m.main-none-unknown-eabihf',
		'CM52S': 'thumbv8.1m.main-none-unknown-eabihf',
		'CM52NS': 'thumbv8.1m.main-none-unknown-eabihf',
		'CM55': 'thumbv8.1m.main-none-unknown-eabihf',
		'CM55S': 'thumbv8.1m.main-none-unknown-eabihf',
		'CM55NS': 'thumbv8.1m.main-none-unknown-eabihf',

CMSIS/Core/Test/requirements.txt

+1 −1

Original line number	Diff line number	Diff line
		@@ -2,5 +2,5 @@
		#
		# Python requirements for build.py script
		#
		python-matrix-runner~=1.0
		python-matrix-runner~=1.2
		lit~=17.0

CMSIS/Core/Test/vcpkg-configuration.json

+3 −8

Original line number	Diff line number	Diff line
		@@ -2,19 +2,14 @@
		"registries": [
		{
		"kind": "artifact",
		"location": "https://aka.ms/vcpkg-ce-default",
		"name": "microsoft"
		},
		{
		"kind": "artifact",
		"location": "https://artifacts.keil.arm.com/vcpkg-ce-registry/registry.zip",
		"location": "https://artifacts.tools.arm.com/vcpkg-ce-registry/registry.zip",
		"name": "arm"
		}
		],
		"requires": {
		"arm:compilers/arm/armclang":"^6.20.0",
		"arm:compilers/arm/armclang":"^6.22.0",
		"arm:compilers/arm/arm-none-eabi-gcc": "^13.2.1",
		"arm:compilers/arm/llvm-embedded": "^17.0.1-0"
		"arm:compilers/arm/llvm-embedded": "^18.1.3"
		}
		}

		No newline at end of file

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