Commit 6025021d authored by Jordan Yates's avatar Jordan Yates Committed by Carles Cufí
Browse files

NN: Import CMSIS-NN (CMSIS 5.8.0) 

This commit imports the library source code of the CMSIS-NN, which is
part of the CMSIS 5.8.0 release.

Note that this commit only imports the source code required to build
the CMSIS-NN library and does not import extraneous components such as
the build script and test suite.

Also note that only the TFL micro compliant functions are imported, see:
    https://github.com/ARM-software/CMSIS_5/tree/develop/CMSIS/NN
The legacy API's are no longer maintained and trigger compiler warnings.

Origin: CMSIS_5
License: Apache-2.0
URL: https://github.com/ARM-software/CMSIS_5/tree/5.8.0


commit: 13b9f72f212688d2306d0d085d87cbb4bf9e5d3f
Purpose: Provide NN functions for Arm devices
Maintained-by: External

Signed-off-by: default avatarJordan Yates <jordan.yates@data61.csiro.au>

file import
parent b0612c97

CMSIS/NN/Include/arm_nn_tables.h

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/* ----------------------------------------------------------------------

 * Project:      CMSIS NN Library

 * Title:        arm_nn_tables.h

 * Description:  Extern declaration for NN tables

 *

 * $Date:        09. October 2020

 * $Revision:    V.1.0.1

 *

 * Target Processor:  Cortex-M cores

 * -------------------------------------------------------------------- */

/*

 * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.

 *

 * SPDX-License-Identifier: Apache-2.0

 *

 * Licensed under the Apache License, Version 2.0 (the License); you may

 * not use this file except in compliance with the License.

 * You may obtain a copy of the License at

 *

 * www.apache.org/licenses/LICENSE-2.0

 *

 * Unless required by applicable law or agreed to in writing, software

 * distributed under the License is distributed on an AS IS BASIS, WITHOUT

 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

 * See the License for the specific language governing permissions and

 * limitations under the License.

 */



#ifndef _ARM_NN_TABLES_H

#define _ARM_NN_TABLES_H



#include "arm_math_types.h"



/**

* @brief tables for various activation functions

*

*/



extern const q15_t sigmoidTable_q15[256];

extern const q7_t sigmoidTable_q7[256];



extern const q7_t tanhTable_q7[256];

extern const q15_t tanhTable_q15[256];



/**

 * @brief 2-way tables for various activation functions

 *

 * 2-way table, H table for value larger than 1/4

 * L table for value smaller than 1/4, H table for remaining

 * We have this only for the q15_t version. It does not make

 * sense to have it for q7_t type

 */

extern const q15_t sigmoidHTable_q15[192];

extern const q15_t sigmoidLTable_q15[128];



#endif /*  ARM_NN_TABLES_H */

CMSIS/NN/Include/arm_nn_types.h

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/*

 * Copyright (C) 2020-2021 Arm Limited or its affiliates. All rights reserved.

 *

 * SPDX-License-Identifier: Apache-2.0

 *

 * Licensed under the Apache License, Version 2.0 (the License); you may

 * not use this file except in compliance with the License.

 * You may obtain a copy of the License at

 *

 * www.apache.org/licenses/LICENSE-2.0

 *

 * Unless required by applicable law or agreed to in writing, software

 * distributed under the License is distributed on an AS IS BASIS, WITHOUT

 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

 * See the License for the specific language governing permissions and

 * limitations under the License.

 */



/* ----------------------------------------------------------------------

 * Project:      CMSIS NN Library

 * Title:        arm_nn_types.h

 * Description:  Public header file to contain the CMSIS-NN structs for the

 *               TensorFlowLite micro compliant functions

 *

 * $Date:        19. March 2021

 * $Revision:    V.2.0.0

 *

 * Target Processor:  Cortex-M cores

 * -------------------------------------------------------------------- */



#ifndef _ARM_NN_TYPES_H

#define _ARM_NN_TYPES_H



#include <stdint.h>



/** CMSIS-NN object to contain the width and height of a tile */

typedef struct

{

    int32_t w; /**< Width */

    int32_t h; /**< Height */

} cmsis_nn_tile;



/** CMSIS-NN object used for the function context. */

typedef struct

{

    void *buf;    /**< Pointer to a buffer needed for the optimization */

    int32_t size; /**< Buffer size */

} cmsis_nn_context;



/** CMSIS-NN object to contain the dimensions of the tensors */

typedef struct

{

    int32_t n; /**< Generic dimension to contain either the batch size or output channels.

                     Please refer to the function documentation for more information */

    int32_t h; /**< Height */

    int32_t w; /**< Width */

    int32_t c; /**< Input channels */

} cmsis_nn_dims;



/** CMSIS-NN object for the per-channel quantization parameters */

typedef struct

{

    int32_t *multiplier; /**< Multiplier values */

    int32_t *shift;      /**< Shift values */

} cmsis_nn_per_channel_quant_params;



/** CMSIS-NN object for the per-tensor quantization parameters */

typedef struct

{

    int32_t multiplier; /**< Multiplier value */

    int32_t shift;      /**< Shift value */

} cmsis_nn_per_tensor_quant_params;



/** CMSIS-NN object for the quantized Relu activation */

typedef struct

{

    int32_t min; /**< Min value used to clamp the result */

    int32_t max; /**< Max value used to clamp the result */

} cmsis_nn_activation;



/** CMSIS-NN object for the convolution layer parameters */

typedef struct

{

    int32_t input_offset;  /**< Zero value for the input tensor */

    int32_t output_offset; /**< Zero value for the output tensor */

    cmsis_nn_tile stride;

    cmsis_nn_tile padding;

    cmsis_nn_tile dilation;

    cmsis_nn_activation activation;

} cmsis_nn_conv_params;



/** CMSIS-NN object for Depthwise convolution layer parameters */

typedef struct

{

    int32_t input_offset;  /**< Zero value for the input tensor */

    int32_t output_offset; /**< Zero value for the output tensor */

    int32_t ch_mult;       /**< Channel Multiplier. ch_mult * in_ch = out_ch */

    cmsis_nn_tile stride;

    cmsis_nn_tile padding;

    cmsis_nn_tile dilation;

    cmsis_nn_activation activation;

} cmsis_nn_dw_conv_params;

/** CMSIS-NN object for pooling layer parameters */

typedef struct

{

    cmsis_nn_tile stride;

    cmsis_nn_tile padding;

    cmsis_nn_activation activation;

} cmsis_nn_pool_params;



/** CMSIS-NN object for Fully Connected layer parameters */

typedef struct

{

    int32_t input_offset;  /**< Zero value for the input tensor */

    int32_t filter_offset; /**< Zero value for the filter tensor. Not used */

    int32_t output_offset; /**< Zero value for the output tensor */

    cmsis_nn_activation activation;

} cmsis_nn_fc_params;



/** CMSIS-NN object for SVDF layer parameters */

typedef struct

{

    int32_t rank;

    int32_t input_offset;  /**< Zero value for the input tensor */

    int32_t output_offset; /**< Zero value for the output tensor */

    cmsis_nn_activation input_activation;

    cmsis_nn_activation output_activation;

} cmsis_nn_svdf_params;



#endif // _ARM_NN_TYPES_H

CMSIS/NN/Include/arm_nnfunctions.h

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CMSIS/NN/Include/arm_nnsupportfunctions.h

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CMSIS/NN/Source/ActivationFunctions/arm_relu6_s8.c

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/*

 * Copyright (C) 2010-2019 Arm Limited or its affiliates. All rights reserved.

 *

 * SPDX-License-Identifier: Apache-2.0

 *

 * Licensed under the Apache License, Version 2.0 (the License); you may

 * not use this file except in compliance with the License.

 * You may obtain a copy of the License at

 *

 * www.apache.org/licenses/LICENSE-2.0

 *

 * Unless required by applicable law or agreed to in writing, software

 * distributed under the License is distributed on an AS IS BASIS, WITHOUT

 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

 * See the License for the specific language governing permissions and

 * limitations under the License.

 */



/* ----------------------------------------------------------------------

 * Project:      CMSIS NN Library

 * Title:        arm_relu6_s8.c

 * Description:  Basic s8 version of ReLU6

 *

 * $Date:        09. October 2020

 * $Revision:    V.1.0.1

 *

 * Target Processor:  Cortex-M cores

 *

 * -------------------------------------------------------------------- */



#include "arm_nnfunctions.h"

#include "arm_nnsupportfunctions.h"



/**

 *  @ingroup groupNN

 */



/**

 * @addtogroup Acti

 * @{

 */



/*

 *  Basic ReLU6 function

 *

 * Refer to header file for details.

 *

 */



void arm_relu6_s8(q7_t *data, uint16_t size)

{

    int32_t i;



    for (i = 0; i < size; i++)

    {

        int32_t ip = data[i];



        ip = MAX(ip, 0);

        data[i] = MIN(ip, 6);

    }

}



/**

 * @} end of Acti group

 */

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