Commit 421dcf35 authored by Julien Massot's avatar Julien Massot Committed by Kumar Gala
Browse files

Core-R: Make GIC and TIM configurable 



Cortex-R may have integrated GIC and private timer,
this patch allow to enable or disable GIC and private timer
driver in cmsis package.

Zephyr already have a GIC driver, and platform may prefer to use
another driver or component for timer.

Give the choice to the caller to enable disable CMSIS driver
implementation.

Signed-off-by: default avatarJulien Massot <julien.massot@iot.bzh>
parent 6a87f101

CMSIS/Core_R/Include/core_cr4.h

+6 −0
Original line number Diff line number Diff line
@@ -47,8 +47,14 @@ 
#define __FPU_PRESENT           0U

#endif



#ifndef __GIC_PRESENT

#define __GIC_PRESENT           0U

#endif



#ifndef __TIM_PRESENT

#define __TIM_PRESENT           0U

#endif



#define __MPU_PRESENT           1U



/* Include Cortex-R Common Peripheral Access Layer header */

CMSIS/Core_R/Include/core_cr5.h

+6 −0
Original line number Diff line number Diff line
@@ -47,8 +47,14 @@ 
#define __FPU_PRESENT           0U

#endif



#ifndef __GIC_PRESENT

#define __GIC_PRESENT           0U

#endif



#ifndef __TIM_PRESENT

#define __TIM_PRESENT           0U

#endif



#define __MPU_PRESENT           1U



/* Include Cortex-R Common Peripheral Access Layer header */

CMSIS/Core_R/Include/core_cr52.h

+6 −0
Original line number Diff line number Diff line
@@ -47,8 +47,14 @@ 
#define __FPU_PRESENT           1U

#endif



#ifndef __GIC_PRESENT

#define __GIC_PRESENT           1U

#endif



#ifndef __TIM_PRESENT

#define __TIM_PRESENT           1U

#endif



#define __MPU_PRESENT           1U



/* Include Cortex-R Common Peripheral Access Layer header */

CMSIS/Core_R/Include/core_cr7.h

+6 −0
Original line number Diff line number Diff line
@@ -47,8 +47,14 @@ 
#define __FPU_PRESENT           0U

#endif



#ifndef __GIC_PRESENT

#define __GIC_PRESENT           1U

#endif



#ifndef __TIM_PRESENT

#define __TIM_PRESENT           1U

#endif



#define __MPU_PRESENT           1U



/* Include Cortex-R Common Peripheral Access Layer header */

CMSIS/Core_R/Include/core_cr8.h

+6 −0
Original line number Diff line number Diff line
@@ -47,8 +47,14 @@ 
#define __FPU_PRESENT           0U

#endif



#ifndef __GIC_PRESENT

#define __GIC_PRESENT           1U

#endif



#ifndef __TIM_PRESENT

#define __TIM_PRESENT           1U

#endif



#define __MPU_PRESENT           1U



/* Include Cortex-R Common Peripheral Access Layer header */

CRA Git | Maintained and supported by SUSTech CRA and CCSE