1
课程详述
COURSE SPECIFICATION
以下课程信息可能根据实际授课需要或在课程检讨之后产生变动。如对课程有任何疑问，请联系授课教师。
The course information as follows may be subject to change, either during the session because of unforeseen
circumstances, or following review of the course at the end of the session. Queries about the course should be directed to the
course instructor.
1.
课程名称 Course Title
先进数字 CMOS 集成电路设计
Advanced Digital CMOS IC Design
2.
授课院系
Originating Department
深港微电子学院
School of Microelectronics
3.
课程编号
Course Code
SME306
4.
课程学分 Credit Value 3
5.
课程类别
Course Type
专业核心课 Major Core Courses
6.
授课学期
Semester
春季 Spring
7.
授课语言
Teaching Language
中英双语 English & Chinese
8.
授课教师、所属学系、联系方
式（如属团队授课，请列明其
他授课教师）
Instructor(s), Affiliation&
Contact
（For team teaching, please list
all instructors）
詹陈长，副教授，深港微电子学院
第一教学楼 105 室
zhancc@sustech.edu.cn
0755-8801-5480
林龙扬，助理教授，深港微电子学院
ZHAN Chenchang, Associate Professor, School of Microelectronics
Rm.105, Lecture Hall 1.
Longyang LIN
Asisstant Professor,School of Microelectronics
9.
实验员/助教、所属学系、联系
方式
Tutor/TA(s), Contact
张年，研究生，深港微电子学院
第一教学楼 208 室
12031025@mail.sustech.edu.cn
0755-8801-8512
ZHANG Nian, PG Student, School of Microelectronics
Rm.208, Lecture Hall 1.
12031025@mail.sustech.edu.cn
0755-8801-8512
杨滨玮，研究生，深港微电子学院
第一教学楼 208 室
0755-8801-8512
YANG Binwei, PG Student, School of Microelectronics
Rm.208, Lecture Hall 1.
12032660@mail.sustech.edu.cn
0755-8801-8512
2
10.
选课人数限额(可不填)
Maximum Enrolment
（Optional）
11.
授课方式
Delivery Method
讲授
Lectures
习题/辅导/讨论
Tutorials
实验/实习
Lab/Practical
其它(请具体注明)
Other（Please specify）
总学时
Total
学时数
Credit Hours
16 0 64 80
12.
先修课程、其它学习要求
Pre-requisites or Other
Academic Requirements
EE202 数字电路
EE203 固态电子学
或
SME202 集成电路基础 II
SME204 微电子基础 II
EE202 Digital Circuits
EE203 Solid-state Electronics
or
SME202 Fundamentals of Integrated Circuit II
SME204 Fundamentals of Microelectronics II
13.
后续课程、其它学习规划
Courses for which this course
is a pre-requisite
无 NA
14.
其它要求修读本课程的学系
Cross-listing Dept.
无 NA
教学大纲及教学日历 SYLLABUS
15. 教学目标 Course Objectives
本课程介绍了先进数字 CMOS（互补金属氧化物半导体）集成电路设计相关的理论知识和实现方法，包括半导体器件
（MOSFET, FinFET 等）基本原理及其建模、CMOS 集成电路制造工艺和版图设计规则，组合和时序电路工作特点，存
储器和寄存器，逻辑门电路的静态和动态原理和设计考虑等。同时，本课程采用工业界标准的设计工具，利用深亚微米的
先进工艺设计套件，培养学生从电路原理图设计、仿真到版图设计以及版图后仿验证的集成电路设计实践能力。
This course introduces the basic concepts and methodologies in advanced digital CMOS (Complementary Metal-Oxide-
Semiconductor) IC design. These include the semiconductor device (MOSFET, FinFET and etc.), basic principles and
modelling, CMOS integrated circuit fabrication process and design rules, characteristic of combinational and sequential
logic circuits, memory and register, behaviours and design considerations of both the static and dynamic logic gates.
Meanwhile, the course uses the industry-standard EDA tools with deep-submicron PDK to guide the students through
designing real-world integrated circuits, starting from schematic design, simulation to layout design and post-layout
verifications.
16.
预达学习成果 Learning Outcomes
通过本课程的学习，学生将了解 MOSFET，FinFET 等现代半导体器件的基本理论，工作特性和制造流程，并掌握先进数
字 CMOS 集成电路相关的设计方法和特点，并利用组合逻辑、时序逻辑、存储器和寄存器等方式设计并搭建具有特定功
能的电路，并通过理论分析和仿真验证，逐步加深对先进数字集成电路的理解；同时学会利用业界标准的电子设计自动化
软件，在实验课部分利用深亚微米先进工艺设计套件完成电路原理图和版图的绘制、DRC/LVS 验证、提取寄生参数、版
图后仿等内容，并对性能-成本-功耗等方面综合考虑，以完成具有高性能指标的课程项目设计。
After completing this course, students will be able to
1) Be familiar with the basic theories, characteristics and fabrication processes related to MOSFET, FinFET and other
3
modern semiconductor devices.
2) Master about the advanced digital CMOS IC design methods.
3) Use logic gates (combinational and sequential), memory and register to build very large-scale integrated circuit with
specific functions.
4) Understand the characteristic of VLSI circuits through theoretical analysis and simulation.
5) Design specific functional circuits with deep-submicron PDK throughtout the complete circuit design flow (drawing
schematic and layout, DRC/LVS, parasitic extraction, post-layout simulation)
6) Understand the circuit design considerations regarding performance-cost-power consumption and other aspects.
17.
课程内容及教学日历 （如授课语言以英文为主，则课程内容介绍可以用英文；如团队教学或模块教学，教学日历须注明
主讲人）
Course Contents (in Parts/Chapters/Sections/Weeks. Please notify name of instructor for course section(s), if
this is a team teaching or module course.)
Lecture Part（理论课部分）：
Lecture 1. Introduction to Digital CMOS VLSI Design: Historical development of VLSI design; Circuit design flow,
approach; Circuit and system representation; Standard cell versus full custom; Hierarchical design; Representative
design companies and institutions; Research fields and application demands; Introduction about School of
Microelectronics（第 1 课：数字 CMOS 超大规模集成电路设计介绍；2 学时）
Lecture 2. Device Theory I: Diode and MOSFET: Basic introduction to the MOS transistor; MOS structure; Different
modes of MOS function, MOS first-order and second-order modelling. （第 2 课：半导体器件理论——二极管与金属氧化
物半导体场效晶体管；2 学时）
Lecture 3. Device Theory II—FinFET and Parasitic Elements: Basic introduction to the FinFET, FinFET structure;
Application field of FinFET; Parasitic resistors and capacitors in CMOS VLSI （第 3 课：半导体器件理论——鳍式场效应
晶体管与电路中的寄生参数；2 学时）
Lecture 4. Integrated Circuit Fabrication Technology, Layout and Packaging: Properties of semiconductor
devices; Fabrication process: transistors and wires; Process roadmap and characteristics; Common fabrication process
errors; Design rules; Layout design considerations and optimization; IC packaging. （第 4 课：集成电路制造技术、版图
以及封装；2 学时）
Lecture 5. Combinational and Sequential Logic Circuit Design: General recipe for complex combinational circuits;
Transistor sizing in combinational circuits; Different logic styles; Layout designs of combinational functions--Euler-path
diagram; Transistor ordering for lower parasitic capacitance and reduced silicon area; Standard-cell-based layout
design approach; Classification of memory and register; Memory in digital circuits (RAM and ROM); Introduction of
latches and registers. （第 5 课：组合逻辑和时序逻辑电路设计；2 学时）
Lecture 6. DC Characteristics of CMOS Basic Logic Gate: CMOS logic gate re-examination; Static behavior of a
CMOS inverter--Voltage Transfer Curve (VTC), Noise margins, βn /βp ratio. （第 6 课：CMOS 基本逻辑电路的直流特
性；2 学时）
Lecture 7. CMOS Timing and Dynamic Circuit Characteristics: Dynamic behavior of CMOS inverter--RC
characterization of CMOS circuits, Fall time, rise time and delay analysis; Delay of complex gates--Elmore delay
model; Driving large loads; Power consumption--Dynamic power consumption, Short-circuit current, Leakage. （第 7
课：CMOS 时序和动态电路特性；2 学时）
Lecture 8. Advanced CMOS Logic Circuit Design Considerations: High speed design considerations; Review of
static CMOS gates--Complementary logic, Ratioed logic, Pass transistor logic; Dynamic CMOS logic--Basic principles
and examples, Properties of dynamic logic gates, Performance and limitations; Domino logic--General operation and
4
properties, Performance and Limitations. Standard-cell-based Circuit Design; Introduction of EDA tools (Cadence,
Synopsys, Mentor, Empyrean and etc.); Current R&D Challenges（第 8 课：先进 CMOS 逻辑电路设计考虑；2 学时）
Lab Part（实验课部分）：
Lab 1. EDA Environment Configuration, Schematic Design and Simulation: Environment setup and Cadence basic
on Linux Server, Schematic entry and simulation with Analog Design Environment, Hierarchical Schematic Design. （实
验 1：电子设计自动化工具的环境配置、电路原理图设计与仿真；8 学时）
Lab 2. Layout Design and Verifications: Layout design and design rule check (DRC), Layout versus schematic
(LVS). （实验 2：版图设计与验证；20 学时）
Lab 3. Post-Layout Simulation and Hierarchical Layout: Parasitic extraction, Post-Layout Simulation and
Hierarchical Layout. （实验 3：版图后仿真以及层级版图设计；12 学时）
Project. Full-custom design of digital circuits: Schematic design, layout design and post-layout verification of digital
circuits (multiplier, memory and etc.) using full-custom design method. （课程项目：数字电路的全定制设计；24 学时）
18.
教材及其它参考资料 Textbook and Supplementary Readings
指定教材 Textbook:
Neil H. E. Weste and David M. Harris, CMOS VLSI Design, 4
th
Edition, Pearson Education Asia Limited, 2010.
推荐参考资料 References:
1.Digital Integrated Circuits: A Design Perspective, 2
nd
Edition, Jan M. Rabaey, Anantha Chandrakasan, and Borivoje
Nikolic, Pearson Education Asia Limited, 2003.
2. CMOS VLSI Design, 4
th
Edition, Required: Neil H. E. Weste and David M. Harris, Pearson Education Asia Limited,
2010.
3. Digital Integrated Circuits: A Design Perspective, 2
nd
Edition, Jan M. Rabaey, Anantha Chandrakasan, and Borivoje
Nikolic, Pearson Education Asia Limited, 2003.
课程评估 ASSESSMENT
19.
评估形式
Type of
Assessment
评估时间
Time
占考试总成绩百分比
% of final
score
违纪处罚
Penalty
备注
Notes
出勤 Attendance 10
课堂表现
Class
Performance
10
小测验
Quiz
课程项目 Projects 40
平时作业
Assignments
20
期中考试
Mid-Term Test
20
期末考试
Final Exam
期末报告
Final
Presentation
其它（可根据需要
改写以上评估方
式）
5
Others (The
above may be
modified as
necessary)
20. 记分方式 GRADING SYSTEM
A.十三级等级制 Letter Grading
B.二级记分制（通过/不通过） Pass/Fail Grading
课程审批 REVIEW AND APPROVAL
21.
本课程设置已经过以下责任人/委员会审议通过
This Course has been approved by the following person or committee of authority
